eugene-tarassov/vivado-risc-v

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

arty-a7boomfpgagenesys2kc705linuxnexys-videorisc-vriscvrocketchip

License & maintenance

Custom or modified license that GitHub does not recognise: read the LICENSE file in the repository before using it in a product.

Last code push 3 months ago.

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