pulp-platform/axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

asicaxiaxi4axi4-litefpgahardwareipnetwork-on-chiprtlsystemverilog

Licencia y mantenimiento

Licencia propia o modificada que GitHub no reconoce: lee el archivo LICENSE del repositorio antes de usarlo en un producto.

Último cambio de código hace 25 días.

	Repositorio	Estrellas	Lenguaje	Licencia	Actividad
1	enjoy-digital/litexBuild your hardware, easily!	★ 4.2k	Python	Other	Activo
2	openhwfoundation/cva6The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configuratio	★ 3.2k	Assembly	Other	Activo
3	jbush001/NyuziProcessorGPGPU microprocessor architecture	★ 2.2k	C	Apache-2.0	Sin cambios
4	GlasgowEmbedded/glasgowScots Army Knife for electronics	★ 2.2k	Python	0BSD	Activo
5	pikvm/pikvmOpen and inexpensive DIY IP-KVM based on Raspberry Pi	★ 10.4k	—	GPL-3.0	Activo
6	nasa-jpl/open-source-roverA build-it-yourself, 6-wheel rover based on the rovers on Mars!	★ 9.7k	HTML	Apache-2.0	Activo
7	hybridgroup/gobotGolang framework for robotics, drones, and the Internet of Things (IoT)	★ 9.5k	Go	Other	Menos activo
8	greatscottgadgets/hackrflow cost software radio platform	★ 8.2k	C	GPL-2.0	Activo